Path: utzoo!attcan!uunet!lll-winken!arisia!quintus!ok
From: ok@quintus.uucp (Richard A. O'Keefe)
Newsgroups: comp.arch
Subject: Re: RISC v. CISC --more misconceptions
Message-ID: <611@quintus.UUCP>
Date: 1 Nov 88 08:14:57 GMT
References: <156@gloom.UUCP> <18931@apple.Apple.COM> <40@sopwith.UUCP> <10471@s.ms.uky.edu>
Sender: news@quintus.UUCP
Reply-To: ok@quintus.UUCP (Richard A. O'Keefe)
Organization: Quintus Computer Systems, Inc.
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In article <10471@s.ms.uky.edu> david@ms.uky.edu (David Herron -- One of the vertebrae) writes:
>I for one would like to see floating point tossed out, since I
>never use it (and I happen to dislike my numerical analysis class :-)

But it _has_ been tossed out of many designs:  the IBM RT PC (at any
rate the old ones) had no floating-point instructions, but used a
National chip (32081?). The AMD 29000 manual says that floating-point
ops are currently extracodes emulated by a trap handler.  And of course
there are all the 680x0, 320xx, 80*86 and so on, with floating-point
done by a co-processor.