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From: lindsay@k.gp.cs.cmu.edu (Donald Lindsay)
Newsgroups: comp.arch
Subject: Re: register save/restore
Message-ID: <3463@pt.cs.cmu.edu>
Date: 1 Nov 88 18:48:53 GMT
References: <3300037@m.cs.uiuc.edu> <1988Oct30.013510.16861@utzoo.uucp> <228@taux02.UUCP>
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Organization: Carnegie-Mellon University, CS/RI
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In article <228@taux02.UUCP> yuval@taux02.UUCP (Gideon Yuval) writes:
>The VAX all-singing CALLS/CALLG was also VERY  slow;

On the 11/780, it was slow because the write-to-memory FIFO wasn't very
deep. The typical CALLS, with a typical register save mask, wrote more
words than the FIFO could absorb. So, the CPU stalled, waiting for the
memory to make more room in the FIFO. 

Of course, there are engineering reasons for avoiding deep FIFO's.  Since
this single design decision caused a bottleneck, I assume that it was
an oversight.

The Nautilius (8700, etc) was carefully tuned against real instruction
traces.  I believe that CALLS runs somewhat better on these machines.


	

-- 
Don		lindsay@k.gp.cs.cmu.edu    CMU Computer Science