Path: utzoo!utgpu!attcan!uunet!seismo!sundc!pitstop!sun!decwrl!pyramid!prls!mips!earl@wright
From: earl@wright (Earl Killian)
Newsgroups: comp.arch
Subject: Re: register save/restore
Message-ID: <7638@wright.mips.COM>
Date: 4 Nov 88 03:39:41 GMT
References: <3300037@m.cs.uiuc.edu> <960006@hpcllla.HP.COM>
Sender: earl@mips.COM
Reply-To: earl@wright (Earl Killian)
Organization: MIPS Computer Systems, Sunnyvale CA
Lines: 9
In-reply-to: daryl@hpcllla.HP.COM (Daryl Odnert)

In article <960006@hpcllla.HP.COM>, daryl@hpcllla (Daryl Odnert) writes:
>Some systems use a mixed strategy.  For example, both the HP Precision
>Architecture (HPPA) and the MIPS R2000 split up the register set into
>two partitions, a caller-saves set and a callee-saves set.

Most people don't realize it, but so does 4.3bsd on the VAX.  r0-r5
are caller saves, r6-r11 are callee-saves.  Some VAX compilers (but
not 4.3bsd cc!) take advantage of this, with good effect.
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