Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!decwrl!labrea!agate!bionet!apple!bloom-beacon!tut.cis.ohio-state.edu!mailrus!ncar!tank!uxc!uxc.cso.uiuc.edu!urbsdc!aglew From: aglew@urbsdc.Urbana.Gould.COM Newsgroups: comp.arch Subject: Re: register save/restore Message-ID: <28200229@urbsdc> Date: 5 Nov 88 21:32:00 GMT References: <3300037@m.cs.uiuc.edu> Lines: 22 Nf-ID: #R:m.cs.uiuc.edu:3300037:urbsdc:28200229:000:1147 Nf-From: urbsdc.Urbana.Gould.COM!aglew Nov 5 15:32:00 1988 >I haven't seen anyone mention the idea of mixing caller-saves and callee-saves >methods: the caller hands to the callee a mask of live registers; the callee >ANDs this with a mask of the registers it uses and saves the registers whose >corresponding bits are set. The mask the callee hands to the routines it calls >is the OR of these two masks. (I hope that's clear). > > Amos Shapir amos@nsc.com >National Semiconductor (Israel) P.O.B. 3007, Herzlia 46104, Israel >Tel. +972 52 522261 TWX: 33691, fax: +972-52-558322 >34 48 E / 32 10 N (My other cpu is a NS32532) There has been a paper on this; sorry, memory fails. The best argument I heard against this sort of operation is that it makes high performance instruction dispatch difficult - you can't dispatch instructions after the SAVE-MASK until the mask has been computed, because you don't know which registers are used. In general, instructions that do not have static register addressing imply an instruction dispatch stall. This is, of course, not a question on the current generation of microprocessors, which do not really use any advanced instruction dispatch techniques.