Path: utzoo!attcan!uunet!husc6!bloom-beacon!athena.mit.edu!tada From: tada@athena.mit.edu (Michael Zehr) Newsgroups: comp.arch Subject: Comiplers for RISC v. CISC Message-ID: <7832@bloom-beacon.MIT.EDU> Date: 6 Nov 88 00:53:10 GMT References: <156@gloom.UUCP> <890@cps3xx.UUCP> <10194@cup.portal.com> <10722@cup.portal.com> Sender: daemon@bloom-beacon.MIT.EDU Reply-To: tada@athena.mit.edu (Michael Zehr) Organization: Massachusetts Institute of Technology Lines: 22 In article <10722@cup.portal.com> bcase@cup.portal.com (Brian bcase Case) writes: >The architecture has little if anything to do with this. The compiler >is a comparatively-meager one-time investment, and getting a good one >is very important. A good optimizing compiler is probably easier to >write for a simple machine (e.g. RISC) than for a complex machine. A "simple" machine? To use RISC to it's full benefit you have to try and cut CPU to memory data exchange, keep piplines well-filled, probably try to keep memory references in burst to increase cache hit rate. My guess is that's it's easier to write a working compiler for RISC than for CISC, but a good optimizing compiler would have to be very complicated. DISCLAIMER: I don't write compilers. I mostly just use them. But I've read a number of articles saying that the main advantage of RISC is only reached when you have a complicated compiler that uses all the fancy hardware in the machine. Any comment by people who have written compilers for both RISC anc CICS??? -michael j zehr