Xref: utzoo comp.arch:7103 comp.sys.hp:1200 Path: utzoo!utgpu!attcan!uunet!mcvax!enea!kth!draken!bmc1!kuling!irf From: irf@kuling.UUCP (Bo Thide) Newsgroups: comp.arch,comp.sys.hp Subject: RISC vs. CISC vs. RCC Message-ID: <891@kuling.UUCP> Date: 6 Nov 88 00:07:12 GMT Sender: news@kuling.UUCP Reply-To: irf@kuling.UUCP (Bo Thide) Organization: Dept. of Computer Systems, Uppsala University, Sweden Lines: 27 I just came across a report written June this year by the Gartner Group. It says: "We believe that future computer architectures will lie somewhere in between current RISC and CISC implementations... To design an architecture, a vendor must analyze years of instruction traces for existing applications to determine the impact of each instruction in the architecture on real applications. Then for each instruction, the vendor must weigh the costs of including that instruction in the architecture or omitting it. The actual financial cost of adding the instruction, as well as the performance cost, must be considered. Hewlett-Packard used this method in designing its Precision Architecture, and it may account for why HP-PA has demonstrated the best architecture that we have seen. It may also be why HP-PA has 125 instructions instead of only 50. HP-PA may be the first reduced complexity computer." Who else has done the same thing and come up with an RCC (Reduced Complexity Computer)? What if "existing applications" change - would that mean that future RCCs/RISCs might have a different instruction set than HP-PA? ^ Bo Thide'-------------------------------------------------------------- | | Swedish Institute of Space Physics, S-755 91 Uppsala, Sweden |I| [In Swedish: Institutet f|r RymdFysik, Uppsalaavdelningen (IRFU)] |R| Phone: (+46) 18-403000. Telex: 76036 (IRFUPP S). Fax: (+46) 18-403100 /|F|\ INTERNET: bt@irfu.se UUCP: ...!enea!kuling!irfu!bt IP: 192.36.174.1 ~~U~~ -----------------------------------------------------------------sm5dfw