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From: albaugh@dms.UUCP (Mike Albaugh)
Newsgroups: comp.arch,comp.sys.hp
Subject: Re: RISC vs. CISC vs. RCC
Message-ID: <562@dms.UUCP>
Date: 8 Nov 88 17:05:11 GMT
References: <891@kuling.UUCP>
Organization: Atari Games Inc., Milpitas, CA
Lines: 28

From article <891@kuling.UUCP>, by irf@kuling.UUCP (Bo Thide):
> 
>  I just came across a report written June this year by the Gartner Group.
> It says:
> 
> "We believe that future computer architectures will lie somewhere in between
> current RISC and CISC implementations... To design an architecture, a vendor
> must analyze years of instruction traces for existing applications...

	I would like to inject the note that the _choice_ of instruction
traces is very important. As an example, consider the Motorola 6809. It
contains quite a few uh, interesting, instructions that seem to be sort
of "macros" for some quite common code sequences on the 6800. The funny
thing is, those code sequences were commonly used by 6800 programmers to
get around holes in the 6800 instruction set _that_don't_exist_ in the 6809.

	Also, apparently Motorola never used register-register moves in
their own code (or wherever they got their traces), while everyone else
I know did, and was rudely surprised at the _very_slow_ performance of
formerly optimal code.

	The latter "feature" may also have been the result of using
static, rather than dynamic, instruction counts, but Moto salesman
claimed not.

| Mike Albaugh (albaugh@dms.UUCP || {...decwrl!turtlevax!}weitek!dms!albaugh)
| Atari Games Corp (Arcade Games, no relation to the makers of the ST)
| 675 Sycamore Dr. Milpitas, CA 95035		voice: (408)434-1709
| The opinions expressed are my own (Boy, are they ever)