Path: utzoo!attcan!uunet!seismo!esosun!cogen!celerity!jjw
From: jjw@celerity.UUCP (Jim )
Newsgroups: comp.arch
Subject: Re: register save/restore
Message-ID: <197@celerity.UUCP>
Date: 9 Nov 88 18:15:59 GMT
References: <3300037@m.cs.uiuc.edu> <5938@killer.DALLAS.TX.US> <234@taux02.UUCP> <292@quick.COM>
Reply-To: jjw@celerity.UUCP (Jim (JJ) Whelan)
Organization: FPS Computing, San Diego CA
Lines: 12

>In article <234@taux02.UUCP>, amos@taux02.UUCP (Amos Shapir) writes:
>I haven't seen anyone mention the idea of mixing caller-saves and
>callee-saves methods: the caller hands to the callee a mask of live
>registers ...

One "problem" with this is that managing and testing the bits in the mask
can cost more than just saving the registers.  This is defineitely the case
in the FPS Model 500 where the registers can be saved on the register stack
at a cost of a machine cycle each.

This is what we refer to as a "smart cycle" problem -- you can spend more
cycles trying to be clever than it costs to do it the "dumb" way.