Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!decwrl!labrea!rutgers!mailrus!iuvax!pur-ee!hankd From: hankd@pur-ee.UUCP (Hank Dietz) Newsgroups: comp.arch Subject: Re: Architecture Wars, again; survey Summary: Predictions -- will new CISC designs be a success? Message-ID: <9725@pur-ee.UUCP> Date: 9 Nov 88 15:18:34 GMT References: <7316@winchester.mips.COM> <75478@sun.uucp> <10770@cup.portal.c <7809@winchester.mips.COM> Organization: Purdue University Engineering Computer Network Lines: 34 In article <7809@winchester.mips.COM>, mash@mips.COM (John Mashey) writes: ... > 4. Will there be any successful new CISC architectures? ... > 4. No.* I don't agree. There are two kinds of new CISC architectures which we can reasonably expect to continue to be successful in the future: 1. New CISC designs which embed execution mode(s) for compatibility with existing machine(s). For example, the Vax had a pdp11 mode and the 386 really doesn't look much like an 8086 except in that it can pretend to be one. Note that compatibility in this form is very much like having two processors in one, which is easy in microcode but.... (I'd rather see people performing static code analysis and transformation to make old code run on new hardware, but there will *always* be somebody who doesn't believe in that.) 2. Special-purpose processors. For example, it might be kinda neat to have IMSL microcoded so that each subroutine is an instruction... I'm not saying that an appropriate RISC machine couldn't run IMSL just as well, but rather that the cost & packaging of the special-purpose CISC processor can reach a rather large market. On this second note, I wonder how long it will be before everyone realizes that a CISC = RISC + ROM program? __ /| _ | | __ / | Compiler-oriented / |--| | | | | Architecture / | | |__| |_/ Researcher from \__ | | | \ | Purdue \ | \ \ \ \ hankd@ee.ecn.purdue.edu