Path: utzoo!attcan!uunet!ncrlnk!ncrcae!ece-csc!ncsuvx!gatech!fabscal!dorn
From: dorn@fabscal.UUCP (Alan Dorn Hetzel Jr.)
Newsgroups: comp.arch
Subject: Re: HW v. SW (was RISC v. CISC --more misconceptions)
Message-ID: <646@fabscal.UUCP>
Date: 9 Nov 88 18:00:38 GMT
References: <866@cernvax.UUCP> <5195@cbmvax.UUCP>
Reply-To: dorn@fabscal.UUCP (Alan Dorn Hetzel Jr.)
Organization: Fabscal Systems
Lines: 15

Well, when you get right down to it, bit-reversal is the sort of operation
which when done *properly* in hardware, should take *zero* cycles, being
the sort of thing you reduce to an addressing mode.

For example, the Motorola DSP-56000 has an address modifier mode called
"carry-reversal" which causes address increments to start on the high bit
and carry downwards.  This properly produces the order of addresses needed
for the FFT bit-reversed addressing mode, and does it with NO extra clock
cycles above the standard increment mode.

When you think about it, bit-reversal in hardware is little more than
twisting the data path one-half revolution!

Dorn
gatech.edu!fabscal!dorn