Path: utzoo!utgpu!attcan!uunet!husc6!bloom-beacon!tut.cis.ohio-state.edu!rutgers!apple!voder!pyramid!prls!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Architecture Wars, again; survey Message-ID: <7926@winchester.mips.COM> Date: 9 Nov 88 21:36:17 GMT References: <7316@winchester.mips.COM> <75478@sun.uucp> <10770@cup.portal.c <7809@winchester.mips.COM> <9725@pur-ee.UUCP> Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 46 In article <9725@pur-ee.UUCP> hankd@pur-ee.UUCP (Hank Dietz) writes: >In article <7809@winchester.mips.COM>, mash@mips.COM (John Mashey) writes: >> 4. Will there be any successful new CISC architectures? >> 4. No.* > >I don't agree. There are two kinds of new CISC architectures which we can >reasonably expect to continue to be successful in the future: >1. New CISC designs which embed execution mode(s) for compatibility > with existing machine(s). For example, the Vax had a pdp11 mode and > the 386 really doesn't look much like an 8086 except in that it can > pretend to be one. Note that compatibility in this form is very > much like having two processors in one, which is easy in microcode > but.... (I'd rather see people performing static code analysis and > transformation to make old code run on new hardware, but there will > *always* be somebody who doesn't believe in that.) Sorry, I should perhaps have added the words I said when I used the overheads. I specifically said I didn't mean 80486s, 68040s, etc, and I specifically said "architecture", not "design". I believe there will be 486s, 586s, 040s, 050s, etc, etc, probably "forever". If a 486 is considered a "new" architecture, as opposed to an evolution of an old one, then there is zero differentiation between "old" and "new"; it's like calling everything a RISC: the term loses any trace of meaning. >2. Special-purpose processors. For example, it might be kinda neat to > have IMSL microcoded so that each subroutine is an instruction... > I'm not saying that an appropriate RISC machine couldn't run IMSL > just as well, but rather that the cost & packaging of the > special-purpose CISC processor can reach a rather large market. It's certainly possible. Will they be successful? (Time will tell.) >On this second note, I wonder how long it will be before everyone realizes >that a CISC = RISC + ROM program? Not all of us agree with that statement..... :-) -- -john mashey DISCLAIMER: UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086