Path: utzoo!utgpu!attcan!uunet!steinmetz!davidsen
From: davidsen@steinmetz.ge.com (William E. Davidsen Jr)
Newsgroups: comp.sys.ibm.pc
Subject: Re: NMI is SUPPOSED to be disabled!
Keywords: Memory,errors,parity,NMI
Message-ID: <12520@steinmetz.ge.com>
Date: 3 Nov 88 20:12:42 GMT
References: <549@gt-eedsp.UUCP> <10045@bigtex.cactus.org> <7465@nsc.nsc.com> <10175@bigtex.cactus.org>
Reply-To: davidsen@crdos1.UUCP (bill davidsen)
Organization: General Electric CRD, Schenectady, NY
Lines: 34

In article <10175@bigtex.cactus.org> james@bigtex.cactus.org (James Van Artsdalen) writes:

| 	For those not aware: the Intel 80x88 family has a design flaw
| 	that requires external hardware to disable NMI.  Without such
| 	hardware it is not possible to prevent the system from
| 	randomly crashing when NMIs are used.

  I think that IBM was totally out to lunch on many parts of the PC
design, and this is one of them. The way NMI is useful is for situations
requiring panic stop of the current process. This does not imply that in
all cases it will be possible to restart what was going on at the time
of the NMI. Large computers use NMI-like features to allow saving a few
things when power fails, parity errors, etc.

  Designing a system to use NMI for common events seems to me to be a
case of trying to use the wrong tool. The Intel chip has a complete
interrupt structure available, using the 8259 or other chips. There
seems to be no reason for NMI on any recoverable condition. People who
regard parity as a recoverable error don't care if the results are
valid, and I can't agree with people who talk about "recovering from a
parity error" in any way except fixing the machine. In good condition a
PC should have <1 parity/year.

  To blame Intel for providing this feature is to not understand the
correct usage of the chip. I guess IBM screwed up in a number of other
ways, too, since the Intel CPU manual clearly states (for the 8086 and
all later versions) that "interrupts less than 32 are reserved for
future hardware enhancements". A system doesn't "randomly crash" with
NMI unless the hardware is broken or ill-designed such that it generates
a panic interrupt for trivial conditions.
-- 
	bill davidsen		(wedu@ge-crd.arpa)
  {uunet | philabs}!steinmetz!crdos1!davidsen
"Stupidity, like virtue, is its own reward" -me