Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!decwrl!hplabs!hp-pcd!hplsla!hpvcla!johne
From: johne@hpvcla.HP.COM (John Eaton)
Newsgroups: comp.sys.ibm.pc
Subject: Re: NMI is SUPPOSED to be disabled!
Message-ID: <4740028@hpvcla.HP.COM>
Date: 4 Nov 88 16:55:29 GMT
References: <10175@bigtex.cactus.org>
Organization: Hewlett Packard, Vancouver, WA
Lines: 19

<<<
< > Intel did it right.  It's IBM, with their incredibly kludgy, screwed up,
< > committe'd to death AT design that is in error.
<
< Not true.  Intel got it wrong.  IBM did the only thing that could make
< the machine work.
----------
Actually they both blew it. Intel's NMI design problems are non-issues if 
NMI is used for its stated purpose of "catastrophic failures like power
failure or timeout of a system watchdog timer". Their only problem was
placing the vector in low memory instead of up near the Reset vector where
it could be carved in rom. It should not be used as a general purpose 
interrupt. The problem is on the PC buss that sometimes it is the only one
left to grab so you yank on the IO Check line and chain your service routine
into the parity check routine.


John Eaton
!hpvcla!johne