Path: utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!ames!pasteur!ucbvax!hplabs!hpl-opus!jewett
From: jewett@hpl-opus.HP.COM (Bob Jewett)
Newsgroups: comp.sys.next
Subject: Re: NeXT Memory - No Error Checking or Parity !
Message-ID: <69070001@hpl-opus.HP.COM>
Date: 27 Oct 88 17:23:56 GMT
References: <549@gt-eedsp.UUCP>
Organization: HP Labs, High Speed Electronics Dept., Palo Alto, CA
Lines: 29

>> jensen@gt-eedsp.UUCP (P. Allen Jensen) writes:
>> Could an expert on RAM chips respond ?  Is memory really "reliable enough" ?
>> 
To which Roy Smith replies:
> 	I'm hardly an expert on ram, but here goes anyway.  ...
> Make that, oh maybe, 1 error per 400 Mbyte-months.

I too am not a RAM expert, but here is another data point.

We have had about 5000 megabyte-months on 16 HP9000/350 workstations.
(68020, 16 Meg RAM each)  We have seen roughly the same rate of parity
errors.  Whether that error rate is a problem depends a lot on the
application you're running.  If there's a one-bit error when writing out
your term report, it's probably OK.  If it's the final version of an IC
design, it may cost big bucks.

Our file server 350 is equipped with ECC RAM (39 one-Meg chips for each
4 megabytes of RAM).  There is a nightly daemon that "scrubs" the RAM --
finds and fixes all one-bit soft errors.  The log shows two errors fixed
in the last five months.  That kind of RAM is slightly slower, but a
parity error panic on the file server is painful enough that the extra
safety was considered worthwhile.

A subtle point in the statistics is that many (maybe most) soft errors in RAM
are never noticed.  Often RAM is written but not read.

Bob Jewett jewett@hplabs

This is not an official statement of the Hewlett-Packard Company.