Path: utzoo!attcan!uunet!lll-winken!lll-tis!ames!ll-xn!mit-eddie!rutgers!bellcore!faline!thumper!ulysses!andante!alice!debra
From: debra@alice.UUCP (Paul De Bra)
Newsgroups: comp.sys.next
Subject: Re: NeXT Memory - No Error Checking or Parity !
Keywords: Memory,errors,parity
Message-ID: <8348@alice.UUCP>
Date: 26 Oct 88 14:59:41 GMT
References: <549@gt-eedsp.UUCP>
Reply-To: debra@alice.UUCP ()
Organization: AT&T, Bell Labs
Lines: 28

In article <549@gt-eedsp.UUCP> jensen@gt-eedsp.UUCP (P. Allen Jensen) writes:
>Ok, Straight from a NeXT salesrep in response to the question:
>Q: Does the memory have a parity check bit ?
>A: "No"
>
>The reason was that "memory is reliable enough that the added cost
>was not justified."  If you have ever worked on some older equipment
>without parity, your opinion may differ.  Could an expert on RAM
>chips respond ?   Is memory really "reliable enough" ?

NO. (memory is NOT reliable enough)

I have seen memory go bad on ATs, Microvaxen, big Vaxen, ...
My impression is that memory chips are not being tested well enough to
be able to put them in a machine and expect them to still work (within
specifications) in a year or so. 99.9% of the NeXT boxes may never have a
problem, but I don't want to be among the 0.1% that spends weeks on the
phone discussing unidentified problems, which cannot be reproduced, and
tracking them down to a bad memory chip, when the few extra $ for parity
could have pointed out the problem right away. It need not even be 9 chips
for each row of 8; 33 instead of 32 would be adequate (though harder to get).

Paul.


-- 
-------------------------------------------------------------------------
|debra@research.att.com   | uunet!research!debra     | att!grumpy!debra |
-------------------------------------------------------------------------