Path: utzoo!attcan!uunet!husc6!encore!bzs@encore.com
From: bzs@encore.com (Barry Shein)
Newsgroups: comp.sys.next
Subject: Re: NeXT & "threads"
Message-ID: <4162@encore.UUCP>
Date: 11 Nov 88 03:18:45 GMT
References: <10736@reed.UUCP> <363@thor.wright.EDU> <8633@spl1.UUCP>
Sender: news@husc6.harvard.edu
Reply-To: bzs@encore.com (Barry Shein)
Organization: Encore Computer Corp
Lines: 26
In-reply-to: okrieg@eecg.toronto.edu ("Orran Y. Krieger")

>I believe that the current version of MACH on Next does not support 
>multiple processors. However even when it will, each NEXT CPU board has 
>its own local memory etc... Does anyone know if when multiple processor
>boards can be put in will they have a global physical address space
>(i.e. processor A can address processor B`s memory). Hmmm no cache so
>I guess that there would be no consistency problem. However MACH assumes
>uniform access time to memory from all processors.  In a recent talk by
>someone from BBN we were  told that they had real problems getting around
>this assumption. I came away with the belief that they decided that threads
>were not worth supporting except on a single processor.  Will this not
>also be the case with Next?

At the risk of bordering on commercialism (but actually just trying to
provide an existence proof):

Encore delivers Mach on its multiprocessors with threads fully
supported across multiple processors. A lot of the parallelism work is
done here although I'm not sure how much in that particular arena, I
could check easily enough (I could read the sources!)

It all depends on the details of the parallel architecture you are
trying to support, that's a complicated issue. What works well for one
may indeed be difficult on another and BBN is obviously trying to
provide the best tools for their architecture.

	-Barry Shein, ||Encore||