Path: utzoo!attcan!uunet!ksr!breakpoint!richt
From: richt@breakpoint.ksr.com (Rich Title)
Newsgroups: comp.arch
Subject: Re: A simple question on RISC
Message-ID: <392@ksr.UUCP>
Date: 15 Nov 88 14:40:31 GMT
References: <6544@xanth.cs.odu.edu> <75577@sun.uucp> <1618@imagine.PAWL.RPI.EDU> <419@augean.OZ>
Sender: nobody@ksr.UUCP
Reply-To: richt@ksr.UUCP (Rich Title)
Organization: Kendall Square Research, Cambridge MA
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In article <419@augean.OZ> idall@augean.OZ (Ian Dall) writes:
>Can anyone tell me *why* some of these microcoded instructions were
>slower than a combination of simpler instructions on the same machine?
>... Was the difference
>simply incompetence on the part of the micro code writer, or is there
>some reason for this.
>-- 

When I was at DEC, I remember one of the software guys asking one
of the hardware guys essentially this question: why, on the VAX 780,
are the add-compare-branch compound instructions slower than doing
separate add, compare, and branch instructions? The answer had to
do with exceptions and restartability. E.g., if the add-compare-branch
gets a memory fault on the compare step, it has to be restartable,
which means the result of the add cannot yet have been written. I.e.,
the add-compare-branch cannot be implemented straightforwardly by 
doing an add, compare, and branch; but instead it needs to go about
its operations in an unnatural order and save enough state as it
goes so it can always back out if it gets an exception.

I think on later VAXes they figured out how to do this better. 

    - Rich