Path: utzoo!attcan!uunet!ncrlnk!ncr-sd!hp-sdd!hplabs!nsc!amdahl!ames!lamaster
From: lamaster@ames.arc.nasa.gov (Hugh LaMaster)
Newsgroups: comp.arch
Subject: Re: Gates vs Transistors (was: Some facts about the Acorn RISC Machine)
Keywords: Acorn RISC ARM
Message-ID: <18267@ames.arc.nasa.gov>
Date: 16 Nov 88 20:44:13 GMT
References: <543@acorn.UUCP>
Reply-To: lamaster@ames.arc.nasa.gov.UUCP (Hugh LaMaster)
Organization: NASA Ames Research Center, Moffett Field, Calif.
Lines: 20

In article <543@acorn.UUCP> RWilson@acorn.co.uk writes:
>Acorn and built using VLSI Technology Inc's (VTI) 3 micron double level metal
>CMOS process using full custom techniques; samples, working first time, were

>respectively. The ARM comprises 24,000 transistors (circa 8,000 gates). Every

>
>
>

I know this must be obvious to many hardware types out there, but, is this
ratio of transistors/gates typical for CMOS?



-- 
  Hugh LaMaster, m/s 233-9,  UUCP ames!lamaster
  NASA Ames Research Center  ARPA lamaster@ames.arc.nasa.gov
  Moffett Field, CA 94035     
  Phone:  (415)694-6117