Path: utzoo!attcan!uunet!husc6!mailrus!ncar!tank!uxc!uxc.cso.uiuc.edu!urbsdc!aglew
From: aglew@urbsdc.Urbana.Gould.COM
Newsgroups: comp.arch
Subject: Re: A simple question on RISC
Message-ID: <28200238@urbsdc>
Date: 16 Nov 88 15:18:00 GMT
References: <6544@xanth.cs.odu.edu>
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Nf-ID: #R:xanth.cs.odu.edu:6544:urbsdc:28200238:000:888
Nf-From: urbsdc.Urbana.Gould.COM!aglew    Nov 16 09:18:00 1988


>> Or if they (wizzbang instructions) got used, it was
>> so rare that it didn't matter. Or they got used, and it was slower
>> than some combination of simple instructions. Or all of the above.
>
>Can anyone tell me *why* some of these microcoded instructions were
>slower than a combination of simpler instructions on the same machine?
>I am not debating CISC vs RISK here since both cases run on the *same*
>(cisc) machine.  If nothing else the second case must have resulted in
>more memory accesses for instruction fetches. Was the difference
>simply incompetence on the part of the micro code writer, or is there
>some reason for this.
>
> Ian Dall

On at least one machine I am familiar with there was a lot of hardware
provided expressly for optimizing, eg. instruction memory accesses.
It was a lot harder to access memory from microcode than it was from
the instruction stream.