Path: utzoo!attcan!uunet!husc6!mailrus!ncar!boulder!ccncsu!handel.colostate.edu.!rro
From: rro@handel.colostate.edu. (Rod Oldehoeft)
Newsgroups: comp.arch
Subject: Re: Lisp "future" instruction in 88k hardware.
Message-ID: <629@ccncsu.ColoState.EDU>
Date: 18 Nov 88 23:13:05 GMT
References: <3401@geaclib.UUCP> <3410@geaclib.UUCP> <6410@june.cs.washington.edu>
Sender: news@ccncsu.ColoState.EDU
Reply-To: rro@handel.colostate.edu..UUCP (Rod Oldehoeft)
Organization: Colorado State University, Ft. Collins CO 80523
Lines: 12

In article <6410@june.cs.washington.edu> david@uw-june.UUCP (David Callahan) writes:
>
>A different approach used on the HEP machine from Denelcor
>was to multiplex more traditional "instruction streams" 
>on one processor. The processor could support 64 instruction
>streams and one instruction stream could fork off a new instruction
>stream in one instruction (assuming resources available, trap otherwise).
>The HEP then provided Full/Empty bits on each word of memory to support "join" 
>operations.
>
Mitch Alsup, 88k person, was a compiler guru at Denelcor;
no surprise that HEP-like features appear.