Path: utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!ames!amdahl!uunet!bywater!acheron!scifi!njs From: njs@scifi.scifi.UUCP (Nicholas J. Simicich;?) Newsgroups: comp.arch Subject: Re: Why is the RT slow? Message-ID: Date: 19 Nov 88 01:32:42 GMT References: <5046@polya.Stanford.EDU> <691@quintus.UUCP> <20791@apple.Apple.COM> Sender: njs@scifi.UUCP Organization: Nick Simicich, Peekskill, NY Lines: 33 In-reply-to: baum@Apple.COM's message of 17 Nov 88 18:44:54 GMT In article <20791@apple.Apple.COM> baum@Apple.COM (Allen J. Baum) writes: ......... > I don't think its very mysterious why the RT performance is so bad. Aside from > the dark rumours that the architecture was deliberately crippled so as not to > impact existing product lines, it (the implementation, NOT the architecture) > was not whizzy because of engineering tradeoffs. They stuck to a microcomputer > bus, they used a process technology that was barely state-of-the-art (or > wasn't by the time they finished, anyway), did not have a cache. It only ran > at 6MHz! Why bother with a cache! They made lots of tradeoffs for backwards > compatibility with existing systems. The bus for adapter cards does, in fact, run at 6 MZ, and is similar to an AT bus. But the above quoted article implies that this has something to do with the speed of the processor. This is just not true. The processor/memory/floating point bus is totally separate, and it has its own clock. The 125 RT executes programs at about twice the speed of the original RT. The current model, the 135, is 25%-30% faster than that, far as I can tell. The bus is still 6MZ. I won't comment on rumors unless you buy me a drink at Usenix :-) and even then I might not. ...... > -- > baum@apple.com (408)974-3385 > {decwrl,hplabs}!amdahl!apple!baum My personal comments: Today's RT is a lot faster than yesterday's RT. If you are interested, there is a salesman near you. -- Nick Simicich --- uunet!bywater!scifi!njs --- njs@ibm.com (Internet)