Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!amdcad!ames!oliveb!tymix!antares!jms From: jms@antares.UUCP (joe smith) Newsgroups: comp.os.misc Subject: Re: Multi-CPU system task scheduling Summary: BiiN does it in hardware. Message-ID: <267@antares.UUCP> Date: 17 Nov 88 10:03:50 GMT References: <2174@ficc.uu.net> <1125@igloo.UUCP> Reply-To: jms@antares.UUCP (joe smith) Organization: Tymnet QSATS, San Jose CA Lines: 28 In article <2174@ficc.uu.net>, walker@ficc.uu.net (Walker Mangum) writes: > > I'm working on a real-time multi-CPU system in which a process can > be scheduled by another process, a timer, or an event in the "most > attractive" CPU. The actual mechanics of loading and scheduling > the new process work just fine. The problem is the definition of > "most attractive" CPU. This information may not help in your particular problem, but you might want look at how BiiN is doing it. Their CPUs have the ability to do a context switch and pull the next task block off of a queue in a single instruction. The scheduler software builds a queue of runnable processes that the hardware understands. Whenever a CPU determines that it cannot run the current process anymore (waiting for a resource, for I/O, or time quanta expired), it picks the next available process to run. There is no need to schedule a job for a particular CPU; they are all identical. In order for this to work, all I/O controllers have to be accessable to all CPUs. All CPUs see the same set of interrupts. Whichever CPU that can handle it first takes care of the interrupt. I doubt that your system has this capability, but I find the concept intriguing. -- +----------------------------------------------------------------------------+ | TYMNET:JMS@F29 CA:"POPJ P," UUCP:{ames|pyramid}oliveb!tymix!antares!jms | | INTERNET: (Office-1.ARPA is no more) PHONE:Joe Smith @ (408)922-6220 | +----------------------------------------------------------------------------+