Path: utzoo!attcan!uunet!husc6!bloom-beacon!oberon!orion.cf.uci.edu!ucsd!sdcc6!sdcc10!cs161agc From: cs161agc@sdcc10.ucsd.EDU (John Schultz) Newsgroups: comp.sys.amiga Subject: Re: COMDEX Announcements [TMS340 GSP] Summary: Hot Chips, Real, Real FAST. Keywords: TI, 34010, 34020, FAST, fast, Fast, Real-time. Message-ID: <17@sdcc10.ucsd.EDU> Date: 23 Nov 88 21:02:15 GMT References: <13541@oberon.USC.EDU> <7718@well.UUCP> <13603@oberon.USC.EDU> Reply-To: cs161agc@sdcc10.ucsd.edu.UUCP (John Schultz) Organization: University of California, San Diego Lines: 70 In article <13603@oberon.USC.EDU> papa@pollux.usc.edu (Marco Papa) writes: [...TMS34010 dialogue...] >Best case for BitBlt: 23.5 Million bits/sec. with VRAM (video RAM). >This is with the 34010 from 1986. I don't know if TI has upgraded the chip >with a faster clock. > >-- Marco Papa 'Doc' >-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= In 1988 we have the TMS34020, 32 bit graphics processor. Here is a short blurb from Byte, September 1988: The '20 is the newest member of Texas Instruments' (TI) TMS340 GSP Family. Depending on the instruction mix, it's between 6 and 50 times faster in key graphics operations than its predecessor, the TMS34010 (the '10). The '20 runs at 10 million instructions per second (MIPS) when executed from its 512-byte instruction cache. It's designed to connect directly to a second '20 as well as the 40-million-floating-point-operation-per-second (MFLOPS) TMS34082 graphics floating-point coprocessor (the '82 FPU). The '20 has instructions that can perform pixel- or bit-aligned block transfers at 142 megabits per second, and when using the TMS44C251 1-megabit video RAM (the 44C251 VRAM), the '20 can execute fills at up to 1.136 gigabits per second. ... [End of blurb] The article goes on to state how these chips interface and interact, etc. The 34082 FPU has _built in_: [from page 265] One-operand operations: Absolute value, 1's complement, Square root, 2's complement. Two-operand operations: Add, Divide, Subtract, Compare, Multiply. Conversions: integer to single, single to integer, integer to double, double to integer, single to double, double to single. Matrix Operations: 4x4,4x4 multiply, 3x3,3x3 multiply,1x4,4x4 1x3,3x3 multiply. Graphics Operations: Backface testing, Polygon clipping, polygon elimination, Viewport scaling and conversion, 2-D linear interpolation, 2-D window compare, 2-plane clipping (X,Y,Z), 2-D cubic spline, 3-D linear interpolation, 3-D volume compare, 2-plane color clipping (R,G,B,I), 3-D cubic spline. Image Processing: 3x3 convolution. Chained operations: Polynomial expansion, 1-D minimum/maximum, multiply/accumulate, 2-D minimum/maximum. Vector operations: Add, Dot product, Subtract, Cross product, Magnitude, Normalization, Scaling, Reflection. [...end of excerpt...] The TMS34020, TMS34082, and TMS44C251 are an awesome combination. Imagine real-time VideoScape, imagine a killer flight simulator, 3-D CAD in 3-D with real-time updates. I guess we could call this chipset the "RTCS" or "Real Time Chip Set". If someone is working with the old 34010, then a 34020 version could be right around the corner, as software written for the '10 is compatible with the '20. A board using these chips for the Amiga would definately bring the Amiga state of the art up to workstation power. Simply put, a board like this for the Amiga would be totally awesome [dude]. For more information, look up the September 1988 issue of Byte, "Taking the Wraps off the 34020", pp257-272. Hope I opened some sleepy eyes, John Schultz