Path: utzoo!attcan!uunet!ncrlnk!ncr-sd!hp-sdd!hplabs!decwrl!purdue!bu-cs!encore!pinocchio!corbin
From: corbin@pinocchio.Encore.COM (Steve Corbin)
Newsgroups: comp.sys.encore
Subject: Re: Timing on the Multimax
Message-ID: <4219@encore.UUCP>
Date: 17 Nov 88 17:31:24 GMT
References: <3273@ucdavis.ucdavis.edu> <832@cmx.npac.syr.edu> <2623@alliant.Alliant.COM>
Sender: news@encore.UUCP
Reply-To: corbin@pinocchio.UUCP (Steve Corbin)
Organization: Encore Computer Corp, Marlboro, MA
Lines: 37


 In article <2623@alliant.Alliant.COM> jeff@alliant.Alliant.COM (Jeff Collins) writes:
 >In article <832@cmx.npac.syr.edu> anand@amax.npac.syr.edu (Anand Rangachari) writes:
 >>  This brings up another question about Umax. I know that on a single
 >>processor computer running unix, the cpu is interrupted at regular
 >>intervals by the timer to allow time slice scheduling. The question then
 >>is: Is each processor interrupted every 200 msec for scheduling or is
 >>it just one processor which is interrupted. Thus on our 18 processor system
 >>if the latter were true, each processor will be interrupted only every
 >>3.6 seconds.
 >>
 >	Only one process is interrupted by the system clock.  The
 >system clock generates what is referred to as an arbitrated interrupt.
 >Arbitrated interrputs are handled by the "most eligable" processor.
 >This is determined by the hardware based on the number of other
 >interrupts being handled and some load leveling magic (I never did
 >understand all of the variable used in this arbitration).  This load
 >leveling insures that one CPU is not bombed by interrupts.  So, on
 >average, as you said - each CPU only handles one clock interrupt every
 >3.6 seconds.

The Multimax has both a system clock and a per-processor timer.
The system clock is used for maintaining time of day, handling timed
queues, etc... .  The system clock occurs at the HZ rate set in the
boot parameter file.  These interrupts are "pooled" or "arbitrated"
as described above so that all CPUs in the system share the processing
burden.

The per-processor timers are used for pre-emptive Time Slicing.
If a process does not relinquish the CPU within its time slice limit,
then a TSE interrupt will be taken forcing a reschedule of that process.
The current limit on time slices is 200ms.  Thus it is possible that a
CPU can receive a TSE interrupt every 200ms (CPU bound) or never get one
at all (either I/O bound or making lots of system calls).  It is
application code dependent.
Stephen Corbin	    UUCP:	{bu-cs,decvax,necntc,talcott}!encore!corbin
		    Internet:	corbin@multimax.ARPA