Path: utzoo!attcan!uunet!husc6!uwvax!rutgers!rochester!pt.cs.cmu.edu!b.gp.cs.cmu.edu!ralf From: ralf@b.gp.cs.cmu.edu (Ralf Brown) Newsgroups: comp.sys.ibm.pc Subject: Re: Usable I/O Address range on the PC bus ... Keywords: Limited to addresses up to 0x0400 only?? Message-ID: <3626@pt.cs.cmu.edu> Date: 20 Nov 88 01:12:52 GMT References: <5065@whuts.ATT.COM> <4229@encore.UUCP> <1275@cfa.cfa.harvard.EDU> Organization: Carnegie-Mellon University, CS/RI Lines: 20 In article <1275@cfa.cfa.harvard.EDU> ward@cfa.harvard.EDU (Steve Ward) writes: }In article <4229@encore.UUCP>, corbin@pinocchio.Encore.COM (Steve Corbin) writes: }> ...there are 64 bytes at each I/O }> address if you decode the extra address lines. There 20 address lines }> for memory on the 8088/8086 but only 16 lines are used for I/O. }> } Just to prevent misunderstanding, there are 64 images, or "copies" } of each of the 1024 I/O byte-addressable registers, or I/O byte } locations. This means any I/O addressing done to any of these } 64 "imaged, copied, ghosted, etc" address locations will result } in an access to the same I/O byte location. There are 64 copies of each I/O address used by the motherboard. All 16 I/O address lines are available on the bus, and a board can choose to decode all 16 if it so desires (though many, if not most, don't). -- {harvard,uunet,ucbvax}!b.gp.cs.cmu.edu!ralf -=-=- AT&T: (412)268-3053 (school) ARPA: RALF@B.GP.CS.CMU.EDU |"Tolerance means excusing the mistakes others make. FIDO: Ralf Brown at 129/31 | Tact means not noticing them." --Arthur Schnitzler BITnet: RALF%B.GP.CS.CMU.EDU@CMUCCVMA -=-=- DISCLAIMER? I claimed something? --