Path: utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!bloom-beacon!mit-eddie!uw-beaver!cornell!rochester!pt.cs.cmu.edu!zog.cs.cmu.edu!tgl
From: tgl@zog.cs.cmu.edu (Tom Lane)
Newsgroups: comp.sys.m68k
Subject: 68030 info needed
Message-ID: <3604@pt.cs.cmu.edu>
Date: 18 Nov 88 00:31:41 GMT
Distribution: na
Organization: Carnegie-Mellon University, CS/RI
Lines: 11

Can anyone tell me the exact layout of the cache control register
in the 68030 (i.e., which bits do what)?  The info that Motorola
Literature Distribution sent me is woefully inadequate, and I
can't wait another 2 weeks for a second go-round with them
(amazingly slow service there).

-- 
				tom lane
Internet: tgl@zog.cs.cmu.edu
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