Xref: utzoo comp.arch:7190 comp.sys.misc:1940
Path: utzoo!utgpu!watmath!clyde!att!ucbvax!decwrl!labrea!glacier!jbn
From: jbn@glacier.STANFORD.EDU (John B. Nagle)
Newsgroups: comp.arch,comp.sys.misc
Subject: 250 MHz SPARC implementation
Message-ID: <17839@glacier.STANFORD.EDU>
Date: 13 Nov 88 16:34:04 GMT
References: <19070@uflorida.cis.ufl.EDU> <414@aurora.auvax.uucp>
Reply-To: jbn@glacier.UUCP (John B. Nagle)
Organization: Stanford University
Lines: 10


      Prism is making noises about building a 250MHz implementation of Sun's
SPARC architecture out of Gigabit Logic's gallium-arsenide MSI parts.  This,
however, will not be a single chip, but a board.

      (The DoD types will no doubt be grousing about "premature VHSIC 
insertion" again, as they do whenever the civilian semiconductor houses
embarrass that program.)

					John Nagle