Xref: utzoo comp.arch:7229 comp.sys.misc:1947
Path: utzoo!attcan!uunet!mcvax!enea!erbe.se!prc
From: prc@ERBE.SE (Robert Claeson)
Newsgroups: comp.arch,comp.sys.misc
Subject: Re: 250 MHz SPARC implementation
Message-ID: <330@maxim.ERBE.SE>
Date: 16 Nov 88 08:28:12 GMT
References: <19070@uflorida.cis.ufl.EDU> <414@aurora.auvax.uucp> <17839@glacier.STANFORD.EDU>
Organization: ERBE DATA AB
Lines: 15

In article <17839@glacier.STANFORD.EDU>, jbn@glacier.STANFORD.EDU (John B. Nagle) writes:

>       Prism is making noises about building a 250MHz implementation of Sun's
> SPARC architecture out of Gigabit Logic's gallium-arsenide MSI parts.  This,
> however, will not be a single chip, but a board.
> 
>       (The DoD types will no doubt be grousing about "premature VHSIC 
> insertion" again, as they do whenever the civilian semiconductor houses
> embarrass that program.)

I guess that's true for Intel's 80486 chip as well.
-- 
Robert Claeson
EUnet: rclaeson@erbe.se   Smart ARPAnet: rclaeson@erbe.se
Dumb ARPAnet: rclaeson%erbe.se@uunet.uu.net