Path: utzoo!attcan!uunet!lll-winken!lll-lcc!pyramid!amdcad!rpw3 From: rpw3@amdcad.AMD.COM (Rob Warnock) Newsgroups: comp.arch Subject: Re: CAM hits the market Message-ID: <23791@amdcad.AMD.COM> Date: 16 Dec 88 07:19:25 GMT References: <9809@obiwan.mips.COM> Reply-To: rpw3@amdcad.UUCP (Rob Warnock) Organization: [Consultant] San Mateo, CA Lines: 20 Based on the announced characteristics, I suspect the Am99C10 CAM is intended for applications like MAC-level bridges (note the "selectable 16- or 48-bit"). For that application, 100ns is fine -- even for FDDI. Even with clever hashing, or tree-structured direct-mapping, it'll take a fast node CPU several microseconds to do the same thing. But 256 words is marginal. For bridging apps, you basically need a big enough CAM in each bridge to hold all the source addresses you may ever see on either side of the bridge -- that is, the number of hosts on your net -- which is why I said 256 is marginal. But you can cascade them to expand the size. (The chip is said to include cascade controls.) So the Am99C10 probably has a place in the world. Rob Warnock Systems Architecture Consultant UUCP: {amdcad,fortune,sun}!redwood!rpw3 ATTmail: !rpw3 DDD: (415)572-2607 USPS: 627 26th Ave, San Mateo, CA 94403