Path: utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!cwjcc!mailrus!uflorida!beach.cis.ufl.edu!seeger
From: seeger@beach.cis.ufl.edu (F. L. Charles Seeger III)
Newsgroups: comp.arch
Subject: Re: Testability Features
Message-ID: <19580@uflorida.cis.ufl.EDU>
Date: 17 Dec 88 00:39:42 GMT
References: <8453@bloom-beacon.MIT.EDU> <28200252@mcdurb>
Sender: news@uflorida.cis.ufl.EDU
Reply-To: seeger@beach.cis.ufl.edu (F. L. Charles Seeger III)
Organization: UF EE Dept
Lines: 38

In article <28200252@mcdurb> aglew@mcdurb.Urbana.Gould.COM writes:
|
|..> Richard A. Lethin of MIT asks about testing of VLSI RISCs
|..> and Mark Johnson of MIPs makes some comments.
|
|Talking about testing, I finally think that I have figured out
|one of the things that has been bothering me about hardware
|testability methodology.
|    Most VLSI test methodology seems oriented towards detecting
|*implementation* or *fabrication* errors, not *design* errors.
|Ie. the tests look for bad transistors, or mis-wirings; they
|don't look for adherence to higher level specs.
|    When people talk about test coverage, they mean test coverage
|over a limited space of implementation and fabrication errors,
|not over the much larger space of design errors.

Why does that bother you?  Design errors are supposed to be caught
during the design phase, where the design can be simulated with all
nodes equally observable.  A physical test is only concerned with
testing that individual part, not the design of the part.  Very
few nodes of the physical part are directly observable, which makes
this kind of test most unattractive for testing/debugging the design.

Test coverage is usually computed based on the percentage of nodes where
Stuck-At faults can be detected.  Of course, these are only the grossest
faults, and there is a much larger space of more subtle physical faults.
However, more extensive testing of parts is extremely expensive.  This
sort of thing is done when new processing technology is developed and
is to some extent done during development of new parts, but production
testing and characterization of parts must be affordable and fast.

Apologies in advance, if I have misunderstood your posting.


--
  Charles Seeger            216 Larsen Hall
  Electrical Engineering    University of Florida
  seeger@iec.ufl.edu        Gainesville, FL 32611