Path: utzoo!attcan!uunet!mcvax!dik From: dik@cwi.nl (Dik T. Winter) Newsgroups: comp.arch Subject: Re: Quadruple-Precision Floating Point ? Keywords: REAL*16 hardware Message-ID: <7795@boring.cwi.nl> Date: 21 Dec 88 01:21:28 GMT References: <8561@alice.UUCP> <3688@s.cc.purdue.edu> <285@loligo.fsu.edu> <6053@louie.udel.EDU> Organization: CWI, Amsterdam Lines: 36 (Of course 64 bit means 48 bit mantissa, 128 bit means 96 bit mantissa.) In article <6053@louie.udel.EDU> nelson@udel.EDU (Mark Nelson) writes: > In article <285@loligo.fsu.edu> mccalpin@masig1.ocean.fsu.edu (John D. McCalpin) writes: > > > >The relative speed of 64-bit vector instructions vs 128-bit instructions > >(which cannot currently be vectorized) is typically very close to 100:1 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ (see comment below for the 205.) > >on both the CDC/ETA and Cray machines. > > > If I remember correctly from my days at CDC working with the 205, the > floating point hardware actually produced 128 bit results. There were > different versions of the floating point instructions that returned > different (64-bit) parts of this 128 bit result. The normal instructions > used were the ones that returned a normalized 64 bit result, but for Right, and normalization is done wrong (i.e. first truncate than normalize rather than the other way around). > add and multiply multiply (maybe divide ?) there were instructions to Divide not. > return either the most significant or the least significant 64 bits. This is all very similar to other CDC Cybers. > I am quite sure that these instructions existed in both scalar and > vector forms. These instructions would allow you to add 128 bit > numbers with four additions, and this certainly vectorizes. Not four, you have to do some additional normalizations on the way, but it is close. Question: why does the 205 not vectorize? Simple, vectorization means a stride of 2 (ie. succesive vector elements are separated by one memory word), and that is not like you would want it on the 205. For similar reasons early compilers did not vectorize operations on complex. -- dik t. winter, cwi, amsterdam, nederland INTERNET : dik@cwi.nl BITNET/EARN: dik@mcvax