Path: utzoo!attcan!uunet!mcvax!ukc!strath-cs!glasgow!orr From: orr@cs.glasgow.ac.uk (Fraser Orr) Newsgroups: comp.lang.forth Subject: Re: Assembly or .... Keywords: Assembly Message-ID: <2084@crete.cs.glasgow.ac.uk> Date: 9 Dec 88 13:29:28 GMT References: <1388@aucs.UUCP> <729@convex.UUCP> <1961@crete.cs.glasgow.ac.uk> <2025@garth.UUCP> <2005@crete.cs.glasgow.ac.uk> <2107@garth.UUCP> Reply-To: orr@cs.glasgow.ac.uk (Fraser Orr) Distribution: comp.lang.forth Organization: Comp Sci, Glasgow Univ, Scotland Lines: 25 In article <2107@garth.UUCP> tom@garth.UUCP (Tom Granvold) writes: > Our concern was that each of the interrupt routines had to execute as >quicly as possible so that it would delay other interrupts as little as >possible. > >>I would also say that if you ever try to do this on more complicated processors >>like the 68k and RISCs, then good luck to you, the timing is unbelievably >>complicated, with caches and pipelines and all that. > >We it becomes very difficult, if not impossible, to count machine cycles >for the processors you mention. But if the processor is fast enough, the need >to count cycles is no longer needed because it is more than fast enough. Ok, so you agree with me then, that for these processors it is not necessary to program in assembler. As an interesting aside, it would probably be a straightforward addition to a compiler code generator to get it to produce an equation giving the number of machine cycles taken on some piece of code it had generated (for simple processors of course). >Thomas Granvold ==Fraser Orr ( Dept C.S., Univ. Glasgow, Glasgow, G12 8QQ, UK) UseNet: {uk}!cs.glasgow.ac.uk!orr JANET: orr@uk.ac.glasgow.cs ARPANet(preferred xAtlantic): orr%cs.glasgow.ac.uk@nss.cs.ucl.ac.uk