Path: utzoo!utgpu!attcan!uunet!mcvax!enea!kth!draken!chalmers!ce.chalmers.se!bernerus
From: bernerus@ce.chalmers.se (Christer Bernerus)
Newsgroups: comp.sys.ibm.pc.rt
Subject: Re: Expansion bus compatibility
Summary: Don't take things for granted.
Keywords: Adaptec, IBM, SCSI, headache.
Message-ID: <174@cthce.ce.chalmers.se>
Date: 14 Dec 88 14:49:57 GMT
References: <2211@spdcc.COM>
Reply-To: bernerus@utc.chalmers.se (Christer Bernerus)
Organization: UTC, Dept. of Comp. Eng., Chalmers, Gothenburg, Sweden
Lines: 51

In article <2211@spdcc.COM> dyer@spdcc.COM (Steve Dyer) writes:
>How compatible are the AT-style 16-bit bus slots with most
>16-bit cards sold for the PC/AT and its clones?  Can one
>say reliably that any card which works on an AT bus should
>also work (with appropriate driver support) on an RT?

The answer is unfortunately NO! (at least not reliably)

I've spent quite some time now writing device drivers for SCSI tapes and disks
using the Adaptec AHA-1540 SCSI host adapter. The problem I went into was that
the Adaptec card didn't honor the IOCHRDY signal. It seems to be quite common
that cards for the AT doesn't look at this signal. (Even if they should 
according to the specifications of the AT bus.) 
Using such cards on an RT is a true nightmare. We patched our Adaptec
card so that the clock on the card was stopped when IOCHRDY indicated
that there wasnt any data present yet.  The patch made the card work
just about as much as neccessary for development work.  During the
period I've been looking for other SCSI cards to put into our RT's
without having to patch them. At least the Western Digital WD 7000-ASC
shouldn't be considered, since the OEM manual says:

	4.1.11 I/O CHANNEL READY
	This input to the IBM AT bus is pulled low by a memory or an 
	I/O device to lengthen I/O or memory cycles by an internal number 
	of clock cycles (167 nS).
	**This signal is not used by the WD7000-ASC controller.**

The AT connector table says: 

	Pin A10, IOCHRDY*, N/C.

(BTW They probably meant integral, not internal)

Unfortunately the RT uses this signal quite a lot since the main memory isn't on
the AT-bus.

Another problem I ran into concerns the use of alternate controllers
(3:rd party DMA). 
When naive controllers (or controller programmers) update things
running as a bus master, they think that all memory updates are
atomic.  On the AT they are, since the memory, the controller and the
processor are on the same bus. However, on the RT, the controller is on
another bus than the processor and memory, and being an AT bus master
doesn't lock out the processor from its memory, so the processor can
reach the memory even if there is a controller that is using the AT-bus
as a bus master. This causes problems wehn device drivers sometimes read
partially updated data.

NOTE: I've recently received a new version of the host adapter card from Adaptec
(AHA-1542) and indeed, contrary to earlier indications, they seem to have fixed
at least the IOCHRDY problem.