Path: utzoo!attcan!uunet!lll-winken!lll-tis!helios.ee.lbl.gov!nosc!humu!uhccux!mikem
From: mikem@uhccux.uhcc.hawaii.edu (Mike Morton)
Newsgroups: comp.sys.m68k
Subject: Re: addq.w #n,sp and a pop quiz
Summary: Puzzle answer, and some more puzzles.
Keywords: C asm addq
Message-ID: <2805@uhccux.uhcc.hawaii.edu>
Date: 12 Dec 88 18:26:58 GMT
References: <5005@bsu-cs.UUCP> <5460@cbmvax.UUCP> <1100@ncar.ucar.edu> <1737@oakhill.UUCP>
Distribution: na
Organization: University of Hawaii
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Dave Trissel of Motorola recently wrote:
>There is only one place in the instruction set where a data register is
>implicitly sign-extended. Where?

The phrasing of Dave's question implies that he doesn't count the
extension of a word-sized index in xx(An, Dn.w).  More likely he means
a MOVEM.W to data registers.

[No, Dave, I didn't have to hit the manual for this.  It was burned into
my brain a few years back when I spent an afternoon debugging.  Got any
explanation of WHY this is done?]

Here's some puzzles:
  - what's the fastest way to bump two address regs each by one byte?
  - what's faster than an SCS instruction, but equivalent (except
    for CCR, perhaps)

Forgive me if this has been discussed in this group, but has everyone
heard about the "superoptimizer" discussed in a paper in ASPLOS II?
It does really incredible tricks trying MANY instruction sequences to
see which is the best.  One of my favorites is a four-instruction one
to turn Dn into signum(Dn).  Can anyone solve this?  Perhaps better,
can you do Max(Dx,Dy) or Min in four instructions?

 -- Mike Morton // P.O. Box 11378, Honolulu, HI  96828, (808) 676-6966 HST
      Internet: msm@ceta.ics.hawaii.edu
    (anagrams): Mr. Machine Tool; Ethical Mormon; Chosen Immortal; etc.