Path: utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!rutgers!cmcl2!yale!mfci!colwell
From: colwell@mfci.UUCP (Robert Colwell)
Newsgroups: comp.arch
Subject: Re: Quadruple-Precision Floating Point ?
Keywords: REAL*16 hardware
Message-ID: <591@m3.mfci.UUCP>
Date: 1 Jan 89 19:27:55 GMT
References: <8561@alice.UUCP> <3688@s.cc.purdue.edu> <285@loligo.fsu.edu> <6132@ecsvax.uncecs.edu> <1080@l.cc.purdue.edu>
Sender: colwell@mfci.UUCP
Reply-To: colwell@mfci.UUCP (Robert Colwell)
Organization: Multiflow Computer Inc., Branford Ct. 06405
Lines: 21

In article <1080@l.cc.purdue.edu> cik@l.cc.purdue.edu (Herman Rubin) writes:
>I know of no computer reasonably designed for multiple precision operations.
>What is needed is fast unsigned integer arithmetic.  The hardware for 
>integer multiplication is certainly no more difficult than for floating
>point, and for unsigned actually easier than signed..  With the CPU such
>a small price of the computer, get those instructions in.

The fractional cost of the hardware is indeed insignificant.  But the
fractional cost of designing it in, getting it right, supporting it,
implementing the proper compiler support, and testing it, must all
be paid for by increased sales.  And the apparent collective vote
of all the hardware manufacturers is what you're seeing when you 
point to the lack of this HW support -- we don't see a large market
for multiple precision operations.  That's really the only way you're
going to get any attention to this issue, by proving that there's
a market for it.

Bob Colwell               ..!uunet!mfci!colwell
Multiflow Computer     or colwell@multiflow.com
175 N. Main St.
Branford, CT 06405     203-488-6090