Path: utzoo!utgpu!attcan!uunet!lll-winken!lll-ncis!helios.ee.lbl.gov!pasteur!ames!oliveb!pyramid!prls!mips!earl@wright.mips.com
From: earl@wright.mips.com (Earl Killian)
Newsgroups: comp.arch
Subject: Re: SPARC vs. MIPS on gcc
Keywords: SPARC, MIPS
Message-ID: <10799@wright.mips.COM>
Date: 7 Jan 89 00:48:58 GMT
References: <82150@sun.uucp> <697@hscfvax.harvard.edu> <677@helios.toronto.edu> <3790@druhi.ATT.COM> <10436@winchester.mips.COM> <10574@wright.mips.COM>
Sender: earl@mips.COM
Organization: MIPS Computer Systems, Sunnyvale CA
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When I was unable to duplicate Ed Kelly's gcc results I speculated on
a couple of things that could have caused the discrepency.  Afterward
Ed Kelly and Bob Cmelik from Sun came by and we swapped gcc sources
and found the real answer.  The sources were essentially identical,
but the bison generated grammer was fairly different.  I don't know
why, but Sun's grammer spends 1.22x more time in yyparse.  So we now
agree that with that grammer, compiled -O2, the result is 18.63M total
instructions.  The -O3 result is 18.19M.

The rest of my comments stand with some modification of the numbers:

Of the 12% difference in instruction count, 6% is due to load nops, 4%
is due to instructions that are fetched but annulled on SPARC, leaving
2% more real instructions on MIPS.  The cycle difference before memory
system is now 38% more for SPARC.  Cpu+memory cycle count is 17%
higher on the Sun4/260 than the M/120.  (As before, there's a 6%
further improvement in instructions/cycles when using the next
compiler, which fixes the enum:16 bit-field embarrassment.)

I'd like to thank Ed and Bob for bringing their source and helping me
get my facts straight.  Things will be a lot easier with SPEC...
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