Path: utzoo!attcan!uunet!lll-winken!vette!brooks
From: brooks@vette.llnl.gov (Eugene Brooks)
Newsgroups: comp.arch
Subject: Re: Solid State Secondary Storage
Keywords: ram, wafer, disk, SSD
Message-ID: <16374@lll-winken.LLNL.GOV>
Date: 7 Jan 89 21:44:29 GMT
References: <248@vlsi.ll.mit.edu> <35258@think.UUCP>
Sender: usenet@lll-winken.LLNL.GOV
Reply-To: brooks@maddog.llnl.gov.UUCP (Eugene Brooks)
Distribution: comp
Organization: Lawrence Livermore National Laboratory
Lines: 46

In article <248@vlsi.ll.mit.edu> young@vlsi.ll.mit.edu (George Young) writes:
>
>Our wafer scale integration group is considering developing a new kind
>of computer memory unit -- something we hope might fill in the present
>gap in memory speed and price between magnetic disk and ram.
>
>The Question Is:  What's it good for?  How might it be integrated into 
>existing computer (or other) systems?  What new systems or applications
>would it make feasible?
Speaking as a user of both Cray and micro based machines, a SSD unit which
fills in the gap between main memory and disk performance is very useful.
On a Cray where the processor performance is so high compared to the disk
I/O rates, the SSD is REQUIRED for large programs that do not fit in main
memory (of course we would rather have more main memory).  When main memory
is made of fast static ram it can dominate the cost of the computer and you
can't afford too much of it.  We use the SSD on the Cray for problems involving
a matrix in every zone and problems involving Monte Carlo particle lists.
Normal disk I/O rates, say the 250 megabytes per second that you can squeeze
out of an Eagle, are not sufficient for anything more than a VAX 11/780 class
machine on these problems.

Coding to use a RamDisk is expensive in manpower, so people only resort to it
when they can't afford more main memory.  The high cost of fast static ram makes
much larger main memories on the Cray XMP series prohibitive, hence the SSD and
its use.  For systems using cheap high density dynamic ram people just buy more
main memory and would not be willing to use a RamDisk due to the coding cost.

Whether or not RamDisks will become popular on the future RISC processors
depends on the effectiveness of cache systems.  A large cache with suitably
large cache line sizes can be thought of as the "main memory" and the ram which
you plug into the bus can be thought of as a RamDisk.  For a single cpu this
poses no real problem as making cache lines large, particularly for problems
which have the access patterns which could use a RamDisk, does not have any
serious drawbacks.  For a shared memory multiprocessor very large cache lines
can have a negative impact if processors are contending for ownership of the
cache lines.  As each processor attempts write access to a cache line it must
own it and two processors writing every other word in the line would cause the
entire cache line to flit back and forth on the bus for each write.  In this
case a RamDisk might be competitive, you would drop the latency of main memory
and decrease the cache line size do improve performance for line "flitting"
between processors.  Explicit RamDisk operations for the "large block" transfers
might be usable.  Of course, a hierarchial coherent cache scheme which uses a
single cache for each cpu with a small line size, each hooked to a much larger
shared cache with a larger line size, finally hooked to highly interleaved but
slow dynamic ram might be a better solution (allowing you to live without the
RamDisk and coding effort to use it).