Path: utzoo!attcan!uunet!lll-winken!lll-lcc!ames!pacbell!belltec!jim From: jim@belltec.UUCP (Mr. Jim's Own Logon) Newsgroups: comp.dcom.lans Subject: Re: Token Ring (was: Re: Info on LANs) Summary: LANCE vs 82586 Message-ID: <327@belltec.UUCP> Date: 3 Jan 89 15:03:00 GMT References: <12786@cup.portal.com> <920001@hposdl.HP.COM> <10777@s.ms.uky.edu> <13137@bellcore.bellcore.com> Organization: Bell Technologies, Fremont, CA Lines: 39 In article <13137@bellcore.bellcore.com>, karn@ka9q.bellcore.com (Phil Karn) writes: > Anyone with experience in writing drivers can tell you that performance > depends much more strongly on the hardware design of the controller than > anything else. There are good Ethernet controllers, and there are bad ones. > Van Jacobson of LBL recently presented the results of experiments with two > controller chips (AMD LANCE and Intel 82586) and found dramatic differences. > He was able to run the useful throughput of the LANCE chip very close to 10 > megabits/sec, but the Intel chip did no better than about 5 megabits/sec. It > didn't run into collision problems on the Ethernet; the chip simply didn't > ask for data from the host fast enough. By the way, these were true > end-to-end throughput figures, using TCP/IP. Note that both are greater > than 4 megabits/sec. > While I haven't seen anything that Mr. Jacobson has presented, he is clearly wrong or you are misinterpreting his results. Both the LANCE and the 82586 will request data from the host at speeds sufficient to sustain the 10 Mbps rate of the Ethernet transmission. Underflows do not happen unless there is a system design problem. At Bell Technologies, we have AT compatible cards using a LANCE and one using a 82586. Measuring end to end throughput, the 82586 card clearly outperforms the 8390 (LANCE). But this is because the 82586 card has a 16 bit interface to the dual port memory. I'm sure something similar is present in the Mr. Jacobson's test. At the chip level, all the controllers do is pass information at the Ethernet data rate, and interrupt the system when they are done. The only room for performance differences are in the times required to set up the chip for packet transmission and reception, AND the SYSTEM DESIGN. Dual port memory vs. DMA, interrupt vs. status polling. And I would venture a guess that the particular driver that was used would have somethign to do with the throughput. -Jim Wall Bell Technologies Inc. P.S. Everything I have heard about the chip level bugs of the LANCE make it something to run far away from, especially if you are the code pig that has to do the driver.