Path: utzoo!utgpu!watmath!clyde!ima!spdcc!lexicon!rk
From: rk@lexicon.UUCP (Bob Kukura)
Newsgroups: comp.arch
Subject: Re: Solid State Secondary Storage
Message-ID: <351@lexicon.UUCP>
Date: 11 Jan 89 16:35:21 GMT
References: <248@vlsi.ll.mit.edu> <13487@ico.ISC.COM>
Organization: Lexicon, Inc., Waltham, MA
Lines: 55
In-reply-to: rcd@ico.ISC.COM's message of 10 Jan 89 17:56:33 GMT

In article <13487@ico.ISC.COM> rcd@ico.ISC.COM (Dick Dunn) writes:

   In article <248@vlsi.ll.mit.edu>, young@vlsi.ll.mit.edu (George Young) writes:
   > Our wafer scale integration group is considering developing a new kind
   > of computer memory unit -- something we hope might fill in the present
   > gap in memory speed and price between magnetic disk and ram.
   ...
   > ...So we are left with a box that is:
   > 	capacity of a few hundred megabytes,
   > 	word addressable,
   > 	much faster access than disk,
   > 	much slower than ram,
   > 	and around the same price as disk.

   [stuff deleted]

   If you can pull tricks to get the data paths wide enough that you get a
   very high transfer rate, it could be an interesting product.  However, disk
   arrays may offer you some competition in the higher range of storage
   capacity, and memory sizes are creeping up from below...I wonder just how
   the disk<->memory gap you're aiming at will look a year or two from now.
   (That's not necessarily to say that it's closing, but it is certainly
   moving.)


Most of this discussion has proposed using this device as either a
fast swap device or as a fast replacement for (or cache for) disk
storage.  I would like to see this discussion explore other possible
applications and alternative memory hierarchies.

Since the access time for this device is much faster than the seek
time of a disk, and its transfer rate, storage capacity, and price are
similar to those of a disk, the need for RAM in certain memory
hierarchies might be eliminated completely.

One such case is what I think George Young was getting at - if the
data path between a processor cache and this storage device was wide
enough, this device might replace the RAM and the paging disk in
virtual memory systems.  This would provide consistent access times to
the entire virtual address space and would eliminate thrashing when a
middle layer in the memory hierarchy becomes full.  With this kind of
hierarchy, it might make sense for the processor to maintain two
internal contexts to switch between when a cache fault occurs.

Another case where the RAM in the memory hierarchy might be eliminated
is in real-time systems, such as the digital audio editing systems
that we make at Lexicon.  In order to record, edit, and play back
audio from disk storage devices, we need lots of RAM to buffer data
during the seek times of the disks.  The solid state storage device,
with its fast seek time, might be able to replace both the RAM and the
disk, since the data in RAM is usually accessed only once.

-- 
-Bob Kukura		uucp: {husc6,linus,harvard,bbn}!spdcc!lexicon!rk
			phone: (617) 891-6790