Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!gaas!garner
From: garner@gaas.Sun.COM (Robert Garner)
Newsgroups: comp.arch
Subject: Re: MIPS Architechture Question
Keywords: read-modify-write?  What's that?  SPARC
Message-ID: <85346@sun.uucp>
Date: 14 Jan 89 03:09:22 GMT
References: <557@oracle.UUCP>
Sender: news@sun.uucp
Reply-To: garner@sun.UUCP (Robert Garner)
Organization: Sun Microsystems, Mountain View
Lines: 25

>   So, I'm sitting around one day porting some code to a MIPS R2000
>   processor, and suddenly I realize that I need a "test-and-set"
>   instruction.  Soon thereafter, I realize that the MIPS R2000
>   doesn't seem to have anything remotely resembling a read-modify-write
>   instruction.

Note that SPARC, "a recently designed architecture", has two
synchronization primitives:  SWAP exchanges a memory location
with a processor register and "load-and-store-unsigned-byte", LDSTUB,
is your basic "test-and-set".

Despite not being an IBM "compare-and-swap," SWAP is a relatively
powerful primitive.  As an example, it can be used to do a parallel enqueue
operation to the tail of a linked list without using an explicit semaphore.
(The presence of NIL in the list is used to block other processes.)

Although I am not an MP-expert, compare-and-swap is apparently
difficult to use "safely".  

	- Robert Garner


p.s.  Marketing lives on!  There's a new magazine called:

	MIPS:  The Magazine of Intelligent Personal Systems