Path: utzoo!attcan!uunet!lll-winken!ames!xanth!nic.MR.NET!umn-d-ub!rutgers!cbmvax!jesup
From: jesup@cbmvax.UUCP (Randell Jesup)
Newsgroups: comp.arch
Subject: Re: Wafer Scale Floating Point chip
Keywords: silicon frisbee(tm) floating point
Message-ID: <5720@cbmvax.UUCP>
Date: 18 Jan 89 04:52:14 GMT
References: <335@belltec.UUCP> <34593@bbn.COM>
Reply-To: jesup@cbmvax.UUCP (Randell Jesup)
Organization: Commodore Technology, West Chester, PA
Lines: 9

In article <34593@bbn.COM> slackey@BBN.COM (Stan Lackey) writes:
>be rewritten to get full benefit.  No one wants to replace conventional
>DRAM's with it, because the cache TTM would go up; it can't replace disk
>as it would be volatle.

	Add battery backup.

-- 
Randell Jesup, Commodore Engineering {uunet|rutgers|allegra}!cbmvax!jesup