Path: utzoo!attcan!uunet!lll-winken!ames!mailrus!bbn!rochester!pt.cs.cmu.edu!ius3.ius.cs.cmu.edu!ralphw From: ralphw@ius3.ius.cs.cmu.edu (Ralph Hyre) Newsgroups: comp.sys.apple Subject: Re: testing for 65C02 presence Message-ID: <4069@pt.cs.cmu.edu> Date: 20 Jan 89 00:29:16 GMT References: <8901161831.aa18496@SMOKE.BRL.MIL> <367@greens.UUCP> Organization: Carnegie-Mellon University, CS/RI Lines: 32 ># >300:A9 00 1A 00 ># >300G > SED ;Use known bugs to determine processor type. > LDA #$99 ;Load ACC with max BCD value. Still, none of these will find ALL of the potential differences. I know of two flavors of 65c02 (Rockwell and NCR, I think), perhaps with slightly different instruction sets. Instruction timings may be different as well, like one 'fixed' the bug where certain instructions take an extra cycle when accessing over a page boundary? [I believe Ted Medin wrote this...] In article <546@cod.UUCP>, medin@cod.UUCP (Ted Medin) writes: >Function NMOS 6502 65C02 >--------------------------------------------------------------------------- >Indexed addressing Extra read of Extra read of last >across page invalid address instruction byte >boundary ... >Jump indirect, Page address does Page address increments >address=XXFF not increment and adds one cycle And, how would you test for Zip or Rocket chippedness? There's still a bit of work left to do. -- - Ralph W. Hyre, Jr. Internet: ralphw@{ius{3,2,1}.,}cs.cmu.edu Phone:(412) CMU-BUGS Amateur Packet Radio: N3FGW@W2XO, or c/o W3VC, CMU Radio Club, Pittsburgh, PA "You can do what you want with my computer, but leave me alone!8-)" --