Path: utzoo!utgpu!watmath!isishq!f171.n221.z1.FIDONET.ORG!izot
From: izot@f171.n221.z1.FIDONET.ORG (Geoffrey Welsh)
Newsgroups: comp.sys.cbm
Subject: Ambitious RAM Expansion Hacking
Message-ID: <1287.23DA03C5@isishq.FIDONET.ORG>
Date: 22 Jan 89 17:07:08 GMT
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 > My question is this:  Has anyone done it?  The REU uses some system
 > control lines that I have relatively little experience with (DMA, for
 > instance) and I don't know whether or not they would coexist
 > peacefully.  I don't see why not, but has anyone done it?
 
   REU DMA shuts down the CPU and reads/writes absolute addresses set in its 
registers. Where in C64 memory the REU controller is mapped shouldn't have any 
effect on the DMA.
 
   Your main problem may be driving conflicts with existing internal I/O 
devices. The C64 PRG, for instance, says that $D500 - $D7FF contain SID 
images; if you map the REU controller there, you'll end up generating 
conflicts between the drivers on those two devices when reading that address 
range. The PRG doesn't mention if the VIC-II has the same imaging at 
$D100-$D3FF, but I suspect it would. (Fred, this would be a good time to 
reveal the truth table for the address decoder PLA, please).
 
   I would think that you're stuck with the two I/O blocks at $DE00 and $DF00. 
There are ways to squeeze more than one device into such a block (the BusCard 
II did, and I'd be glad to tell you how if you need the info).
 
   Your other worry is power. Since you're using 1750's, I can only hope that 
you got the "C128-power-supply-with-a-C64-connector-on-it" that comes with the 
1764. If not, and you haven't built a hefty supply yourself, you may be in for 
some trouble.
 
   While looking through the REU DMAC specs, I noticed that there's a byte to 
control which bank of 64K the DMAC moves the data to/from. I wonder if some 
sort of external latch for bit 3 could be used to enable/disable complementary 
1750's and thus give an effective 1 megabyte REU.
 
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