Xref: utzoo comp.sys.m68k:1084 comp.sys.nsc.32k:612
Path: utzoo!attcan!uunet!lll-winken!ames!amdahl!nsc!levy
From: levy@nsc.nsc.com (Jonathan Levy)
Newsgroups: comp.sys.m68k,comp.sys.nsc.32k
Subject: Re: 68030 MMU overhead query
Message-ID: <9120@nsc.nsc.com>
Date: 13 Jan 89 19:55:06 GMT
References: <1487@csuna.UUCP> <BRUCE.89Jan3104109@blue.gwd.tek.com> <216@unet.UUCP>
Reply-To: levy@nsc.nsc.com.UUCP (Jonathan Levy)
Organization: National Semiconductor, Sunnyvale
Lines: 21

I am cross posting this from the 68k group to the 32k group for
interest.

In article <216@unet.UUCP> jimmc@unet.PacBell.COM (Jim McCrae) writes:
>
>	Also, has anyone noticed that the instruction cache on the
>	68030 can actually slow down execution speed? We saw this
>	during evaluation and as yet have no explanation.

Yes, this can happen. Small caches, with low hit ratios can increase
the bus load due to line fills in burst mode. The situation becomes
worse if wait states are evident. The increased bus load then
can interfere with other bus activity that the processor needs
to perform ( such as operand reads or writes).
You may try to disable burst mode and verify this.
(The above information is theoretical, and is based on analysis
that we had done when selecting cache size for the NS32532. The
Instruction cache was selected to be 512 bytes, as smaller
caches had this danger of actually degrading performance)

Jonathan