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From: jdr@gec-rl-hrc.co.uk (jdr)
Newsgroups: comp.sys.transputer
Subject: Re: using wait-states on a T8 or a T4
Message-ID: <8901201659.AA10984@uk.ac.oxford.prg.arendt>
Date: 20 Jan 89 16:40:00 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Organization: The Internet
Lines: 38

> Does anyone have experience of using the MEMWAIT pin on a T8 or a T4 to
> stretch the memory cycle? I have a circuit that doesn't appear to work,
> despite following the timings laid down in the T800 product description. As
> far as I can see, the memory cycle is ending *despite* MEMWAIT being held
> low; I'm taking memwait low at the same point in the cycle as MS3 goes low,
> and I'm using the internal memory configuration available on AD7. (The
> slowest multiplexed DRAM time).

MemWait needs to be sampled as *high* in order to extend the memory cycle.

The transputer samples MemWait close to the last falling edge of ProcClockOut
*before* the end of T4. notMemS3 goes low at exactly this point for the AD7
configuration, and is thus not a sensible strobe to use. Section 8.12 of the
T800 engineering data states that whatever strobe you use, "its delay should be
such as to take the [MemWait] strobe low an even number of periods Tm after
the start of T1, to coincide with a rising edge of ProcClockOut".

If this doesn't help, you might like to send me more details of your memory
configuration, and I'll see if there are any other comments I can make.

My own board has a T800 running at 25 Mhz, with 16 Mbyte of DRAM running
with a 200ns cycle time using the AD6 configuration. I assert MemWait
using a state machine (clocked by ProcClockOut), which is needed to control
a hand-shaking bus interface in part of the transputer's memory map. The
state machine is triggered by a correct address and notMemS2 going low,
and asserts MemWait within 7ns after a rising edge of ProcClockOut.

John//

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