Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!nic.MR.NET!xanth!lll-winken!vette!brooks
From: brooks@vette.llnl.gov (Eugene Brooks)
Newsgroups: comp.arch
Subject: Re: Multi-Processor Serializability
Keywords: data ordering, coherence, shared memory multiprocessing
Message-ID: <19742@lll-winken.LLNL.GOV>
Date: 2 Feb 89 17:20:11 GMT
References: <3492@cloud9.Stratus.COM> <19635@lll-winken.LLNL.GOV> <3507@cloud9.Stratus.COM>
Sender: usenet@lll-winken.LLNL.GOV
Reply-To: brooks@maddog.llnl.gov.UUCP (Eugene Brooks)
Organization: Lawrence Livermore National Laboratory
Lines: 14

In article <3507@cloud9.Stratus.COM> tomc@cloud9.Stratus.COM (Tom Clark) writes:
>Unfortunately volatile does not do it.  Volatile does indeed force a write
>to memory instead of holding an intermediate result in a register, but it
>says nothing about ordering of instructions.  Such a construct does not
>exist in most languages, except for the disabling of optimization.  Sigh.

Reordering of instructions is fine as long as the meaning of the code
is not changed.  The volatile keyword is needed to take care of the
added dimension that memory cells may change spontaneously or must
be changed at the point of the write in order to effect communication
to other devices which the compiler is not managing.  The volatile
references must be performed in proper order, and I believe that ANSI
C specifies this, but any reordering of instructions which do not
affect the values written to volatile memory cells poses no problem.