Xref: utzoo comp.arch:8060 comp.misc:4848 comp.lang.misc:2636 comp.protocols.misc:481 Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!sharkey!atanasoff!hascall From: hascall@atanasoff.cs.iastate.edu (John Hascall) Newsgroups: comp.arch,comp.misc,comp.lang.misc,comp.protocols.misc Subject: When is RISC not RISC? Message-ID: <747@atanasoff.cs.iastate.edu> Date: 30 Jan 89 20:55:04 GMT References: <170@microsoft.UUCP> <4008@hubcap.UUCP> Organization: Iowa State U. Computer Science Department, Ames, IA Lines: 33 X-Orig-Subject: Re: Unification of big and little endian architectures. More-Refs: <482@babbage.acc.virginia.edu> <7193@csli.STANFORD.EDU> <1371@X.UUCP> Yet-More: <5462@pdn.nm.paradyne.com> <731@atanasoff.cs.iastate.edu> In response to someone proposing adding instructions to a RISC machine, I wrote: >> Here it is again, adding instructions to a RISC machine... won't >> be long before we have a RISC machine with more instructions >> than a VAX.... :-) And was "corrected" by someone* thusly: > And again... > Sigh, RISC doesn't mean a small number of instructions. RISC means.... REDUCED Instruction Set Computer (i.e., a reduced number of instructions) True, many RISC machine incorporate a number of other feature, which because they have been used by a number of RISC machines, have come to considered a part of RISC--but there is no reason that these feature could not be part of a CISC machine (other than chip real-estate). I think the real problem here is a poorly named acronym, but it probably sounded "cute" (I, for one, am quite tired of papers titled "A RISCy blah blah blah" etc). Perhaps we could have a new buzzword contest, how about SOC (simple, orthogonal computer)? My $.02 (or less) worth, John Hascall ISU Comp Center * My apologies for losing the attribution above, but rn barfed on the overly long "References:" field and I had to do this by hand.