Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!bloom-beacon!mit-eddie!uw-beaver!blake!ogccse!littlei!omepd!psu-cs!reed!tektronix!tekcrl!tekgvs!keithe
From: keithe@tekgvs.LABS.TEK.COM (Keith Ericson)
Newsgroups: comp.arch
Subject: Re: When is RISC not RISC?
Message-ID: <4592@tekgvs.LABS.TEK.COM>
Date: 3 Feb 89 17:38:40 GMT
Reply-To: keithe@tekgvs.LABS.TEK.COM (Keith Ericson)
Organization: Tektronix, Inc., Beaverton,  OR.
Lines: 14
References:

>
> Sigh, RISC doesn't mean a small number of instructions. RISC means..
>

Seems to me that the "reduced" is a totally incorrect moiniker (sp?):
the truly salient point is that all the instructions are equal
length, to reduce problems maintaining the instruction pipeline.

>Incidentally, wouldn't little-beginnian and big-beginnian be more
>accurate?

Yeah, you're right. Guess it depends on which eye you look out of. :-)

kEITH