Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!sharkey!atanasoff!hascall
From: hascall@atanasoff.cs.iastate.edu (John Hascall)
Newsgroups: comp.arch
Subject: while (*p++ = *p++);  (was Re: Endian wars)
Message-ID: <775@atanasoff.cs.iastate.edu>
Date: 8 Feb 89 14:36:49 GMT
References: <6133@columbia.edu> <3300050@m.cs.uiuc.edu>
Reply-To: hascall@atanasoff.cs.iastate.edu (John Hascall)
Organization: Iowa State U. Computer Science Department, Ames, IA
Lines: 53

In article <3300050@m.cs.uiuc.edu> gillies@m.cs.uiuc.edu writes:

>/* Written 12:25 am  Feb  5, 1989 by PLS@cup.portal.com in m.cs.uiuc.edu:comp.arch */
>This deserves a new subject.


>Second, I was once told that the following C code compiles into 1
>instruction (or something amazingly short) on the PDP-11, C's mother
>machine:

>while (*p++ = *q++);

>This is perhaps part of the reason why strings were designed with
>null-termination

  First, I assume you mean:

     char   *p,*q;

     while (*p++ == *q++);

  I can see no way to code this in 1 PDP instruction, the best I can see
  is (assume R1 is p, R2 is q):

     L:    MOVB  (R1)+,R0              ; temp <- *p++
	   CMPB  (R2)+,R0              ; compare *q++ to temp
	   BEQ   L                     ; again if equal

  now on a machine with more flexibility in addressing modes (i.e., a
  VAX):

     L:    CMPB  (R1)+,(R2)+           ; compare *p++ to *q++
	   BEQL  L                     ; again if equal

  or if we make the assumption that "strings" p and q are less than 64K
  long:

	   CMPC3 #65535,(R1)+,(R2)+    ; while (*p++ == q++);

  now on a MC680x0 (A1,A2):

     L:    CMPB  (A1)+,(A2)+           ; compare *p++ to *q++
	   DBNE  D0,L                  ; "loop mode", assume D0=LARGE_NUMBER
	      or
	   BEQ   L                     ; non-"loop mode"

  Are their any machines which have a combined "compare-and-branch"
  instruction?  Are their any (other) machines which can do this in
  1 instruction (with or without assumptions)?


  John Hascall
  ISU Comp Center