Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ncar!ames!lamaster
From: lamaster@ames.arc.nasa.gov (Hugh LaMaster)
Newsgroups: comp.arch
Subject: Re: risc object sizes; emperical results (was Re: When is RISC not RISC?)
Message-ID: <21664@ames.arc.nasa.gov>
Date: 10 Feb 89 19:56:36 GMT
References: <747@atanasoff.cs.iastate.edu> <6310013@hpcupt1.HP.COM> <21606@ames.arc.nasa.gov> <4280@psuvax1.cs.psu.edu>
Organization: NASA - Ames Research Center
Lines: 16

In article <4280@psuvax1.cs.psu.edu> schwartz@shire.cs.psu.edu (Scott Schwartz) writes:
>Which RISCs did you notice this on?  My experience with gcc-1.33 on a

Well, in looking back at my references, the data are incomplete.  But, I 
seem to recall now that in this newsgroup a few months ago the folks from
Motorola were using gcc generated code for code speed and size comparisons
but I don't remember the details.  So, please let me retract my statement:
it appears to be speculation at this point.  I believe that Sun has made
substantial improvements over their early release for Sparc also.


-- 
  Hugh LaMaster, m/s 233-9,  UUCP ames!lamaster
  NASA Ames Research Center  ARPA lamaster@ames.arc.nasa.gov
  Moffett Field, CA 94035     
  Phone:  (415)694-6117